The present invention relates in general to a semiconductor device, and, more particularly, to a technique that is effective when applied to a semiconductor device having a power supply circuit.
A DC-DC converter, which is widely used as one example of a power supply circuit, has a configuration wherein a power MOS-FET (Metal Oxide Semiconductor Field Effect Transistor) for a highside switch and a power MOS•FET for a lowside switch are connected in series. The power MOS-FET for the highside switch has a switch function for control of the DC-DC converter. The power MOS-FET for the lowside switch has a switch function for synchronization and rectification. The conversion of a power supply voltage is performed by alternately turning these two power MOS-FETs on/off while being synchronized with each other.
Meanwhile, there is a known DC-DC converter in which a Schottky barrier diode is electrically connected to its output in parallel with the power MOS-FET for the lowside switch. That is, the Schottky barrier diode, which has a lower forward voltage VF than a parasitic (body) diode of the power MOS-FET for the lowside switch, is connected in parallel with the power MOS-FET for the lowside switch. A current that flows during the dead time (corresponding to a period in which both power MOS-FETs for highside and lowside switches are turned off) of the DC-DC converter is commutated to the Schottky barrier diode, to thereby reduce the diode conduction loss, as well as a diode recovery loss due to a reverse recovery time (trr) being made fast, whereby a loss produced during the dead time of the DC-DC converter is reduced, thereby to improve its voltage conversion efficiency. In a DC-DC converter considered by the present inventors, the power MOS-FET for the highside switch, the power MOS-FET for the lowside switch, a control IC (Integrated circuit) for controlling the operations of those power MOS-FETs, and the Schottky barrier diode are respectively formed in discrete semiconductor chips, and the respective semiconductor chips are encapsulated in separate packages.
An example of such a DC-DC converter has been described in, for example, Japanese Unexamined Patent Publication No. 2002-217416, which discloses a technique for forming a highside switch by use of a horizontal power MOS-FET and forming a lowside switch by use of a vertical power MOS-FET.
A technique, using resistors and capacitors, for reducing noise that presents a problem for a DC-DC converter in which a control circuit, driver circuits and power MOS-FETs are brought into one chip, has been disclosed in, for example, Japanese Unexamined Patent Publication No. 2001-25239.